AUTOSAR Memory Stack essentials: understand how NvM, Fee/Ea and MemIf work together for reliable storage.
Walk through Flash/EEPROM fundamentals and the AUTOSAR module responsibilities.
Configure common flows: read/write, block management, CRC and error handling.
Gain practical experience with guided labs on configuration and traces.
How this helps: build confidence integrating non‑volatile storage in ECUs.
Who it’s for: designed for individuals with embedded/AUTOSAR background new to Memory Stack.
Includes tips for performance, wear‑leveling and diagnostics integration.
Curriculum
Foundations
- Memory stack overview; goals and data lifecycles
- Flash vs. EEPROM trade-offs (endurance, erase/program, wear-leveling)
- NVRAM requirements: integrity, CRC, redundancy, power-fail tolerance
- ARXML basics for NVRAM entities
NvBlockSwComponents
- Architectural overview and capabilities
- NvData Ports; mapping application data to NVRAM blocks
- Designing NvBlockSwComponents: ownership, update patterns, init defaults
- Nv Block Descriptor essentials (ID, length, RAM mirror, ROM defaults, dataset)
NvM — Non-volatile Memory Manager
- Responsibilities and block state machine; queues and priorities
- Configuration: block descriptors, CRC, single vs. redundant blocks, dataset blocks
- APIs in practice: NvM_ReadBlock/NvM_WriteBlock/NvM_SetRamBlockStatus/...
- Error reporting (Dem) and notifications; performance tips
MemIf — Memory Abstraction Interface
- Role and function groups (read/write/erase/cancel/status/job control)
- Binding to Ea and Fee; driver responsibilities and limitations
- When to choose Ea vs. Fee; implications for block layout
Ea and Fee/Fls layers
- EEPROM Abstraction (Ea): addressing model and block configuration
- Flash EEPROM Emulation (Fee): sectors, wear-leveling, garbage collection
- Fls driver basics; timing and constraints from hardware
Integration lab and troubleshooting
- Hands-on: define NvM blocks, connect MemIf↔Ea/Fee, persist data across reset
- Typical issues: inconsistent lengths, missing ROM defaults, job queue overflows
- Measuring write times and verifying CRC/robustness
Optional modules
Optional — robustness & performance
- Power-fail test patterns; atomic updates, redundant blocks
- Throughput vs. endurance tuning; background vs. immediate jobs
- Versioning of NVRAM data structures
Course Day Structure
- Part 1: 09:00–10:30
- Break: 10:30–10:45
- Part 2: 10:45–12:15
- Lunch break: 12:15–13:15
- Part 3: 13:15–15:15
- Break: 15:15–15:30
- Part 4: 15:30–17:30