Stateflow for Automotive: model robust state machines for controls and diagnostics.
Master events, transitions, guard conditions, temporal logic and function‑call subsystems.
Use hierarchical/parallel states, debouncing and mode management patterns.
Gain practical experience with labs on modeling, simulation and debugging of real ECU behaviors.
How this helps: build clear, testable logic that integrates cleanly with Simulink and code generation.
Who it’s for: designed for individuals with automotive/embedded background using Stateflow in projects.
Includes verification tips (coverage, assertions) and integration with Simulink test tools.
Curriculum
Building models with Simulink
- Simulink introduction; workspace and signal basics
- Implement a simple model; simulate and analyze outputs
State machines with Stateflow
- States and transitions; initialization and execution order
- State actions (entry/during/exit) and transition actions
- Events (broadcast/local) and temporal logic (after, every, at)
- Hierarchy, parallel states and history junctions
Flow charts
- Junctions and transitions; chart execution semantics
- Conditions and guards; data scope and typing
- Mealy vs. Moore style charts; when to choose each
Discrete systems
- Discrete states and sample times; rate transitions
- Discrete transfer functions and state-space models
- Fixed-step simulation tips for deterministic behavior
Continuous systems
- Continuous states; modeling patterns
- Zero-crossings and stiffness; avoiding solver chattering
- Variable-step simulation tips
Solver selection
- Match solver to system dynamics and discontinuities
- Recommended settings for mixed discrete/continuous models
Integration patterns & testing
- Function-call subsystems; integrating charts with plant/control models
- Bus objects, enumerations and data dictionaries
- Lightweight test harnesses and coverage (overview)
Optional modules
Optional — Advanced Stateflow patterns
- Truth tables and state transition tables
- Event-based architectures and temporal logic patterns
- Guidelines for code generation and debugging
Course Day Structure
- Part 1: 09:00–10:30
- Break: 10:30–10:45
- Part 2: 10:45–12:15
- Lunch break: 12:15–13:15
- Part 3: 13:15–15:15
- Break: 15:15–15:30
- Part 4: 15:30–17:30